HSC 2026 ELECTRONICS 2 BOARD EXAM PAPER
(1A)
1. IN ANY LOGIC FAMILY WHEN SPEED OF OPERATION IS INCREASED THE TOTAL AMOUNT OF POWER DISSIPATED IS ________________________
2. 1:64 DEMULTIPLEXER CAN BE DESIGNED WITH _________ SELECT LINES
3. IN ____________ A/D CONVERTERS FOR HIGH RESOLUTION MANY COMPARATORS ARE NECESSARY
4. TO PRODUCE GRAPHICAL IMAGES ____________ DEVICE IS USED.
(1B)
1. WRITE A SUITABLE EXAMPLE OF HEXADECIMAL TO DECIMAL CONVERSION
2. DEFINE POWER DISSIPATION , FANIN/OUT,NIOSE MARGIN
3. EXPLAIN WORKING OF MASTER SLAVE JK FLIP-FLOP WITH DIAGRAM
(2A)
1.SOLVE (1110)2 - (0101)2
2.DRAW AND EXPLAIN BASIC CIRCUIT OF CMOS INVERTER
3.DRAW CIRUIT DIAGRAM OF 4BIT RIGHT SHIFT REGISTER WITH D FLIPFLOP
(2B)
1.STATE & PROVE DMORGANS THEOREM WITH TRUTH TABLE
2.EXPLAIN 4:1 MULTIPLEXER USING LOGIC GATES
(3A)
1.DRAW AND EXPLAIN BASIC CIRCUIT OF TTL NOR GATE
2.IMPLEMENT F(A,B,C) = M(2,4,5,7) USING MULTIPLEXER
3.EXPLAIN WORKING OF COUNTER TYPE A/D CONVERTER
(3B)
1.EXPLAIN WORKING OF 3BIT SYNC COUNTER WITH DIAGRAM.
2.BLOCK DIAGRAM OF DIGTAL COMPUTER WITH FUNCTION OF EACH BLOCK
(4A)
1. EXPLAIN 1S COMPLIMENT & 2S COMPLIMENT WITH EXAMPLES
2. EXPLAIN NAND AND NOR GATES IN BRIEF
3. WORKING OF CLOCKED RS FLIPFLOP USING NAND GATES
(4B)
1. EXPLAIN 1:4 DEMULTIPLEXER WITH DIAGRAM, TT, 1 APPLICATION
2. EXPLAIN R2R LADDER TYPE D/A CONVERTER.
(5A)
1. EXPLAIN HEXADECIMAL SYSTEM .CONVERT(AB9)16 TO ( )2
2. IMPLEMENT F1 = M(1,3,5,7) , F2 = (2,4,6)
3. EXPLAIN RAM ,EPROM ,EEPROM
(5B)
1. PROVE A + A .B = A + B
2. WHAT IS MODULUS OF A COUNTER
3. HOW TO FLIPFLOPS ARE REQUIRED TO CONSTRUCT MOD 8 ,16 ,32 COUNTER
(OR )
1. EXPLAIN DIFFERENT NUMBER SYSTEMS WITH RADIX
2. EXPLAIN HALF ADDER WITH LOGIC DIAGRAM AND TRUTH TABLE
3. EXPLAIN WORKING OF CLOCKED D FLIP FLOP
4. WHAT IS DECODER EXPLAIN BCD TO DECIMAL DECODER
5. EXPLAIN WEIGHTED REGISTER TYPE D/A CONVERTER
6. WRITE ITS DISADVANTAGES .
